1. Field of the Invention
The present invention relates to the field of redundancy circuits used to increase the production yield of non-volatile memory integrated circuits.
2. Prior Art
For non-volatile memory integrated circuits, especially for high density memory arrays, particle defects which can occur due to fabrication environments normally cause the memory array to fail, leading to yield loss in production final test, increasing the cost of the final product. A technique commonly known as redundancy repair (row or column or block) can be used in many cases to repair the failed memory portion. The redundancy circuits typically store the failed addresses in some form of storage, and compare the incoming addresses with the stored redundancy addresses for a match. If a match is found, the redundancy array is enabled and the main array is disabled, typically by way of an enable fuse.
Some conventional implementations use a resistor fuse as a one time programmable element to store the failed addresses. The fuse is blown by applying a high current through the fuse by some test enabling circuit. Because the fuse blowing current is high, the transfer switch must be large, requiring a large chip area. Other implementations use EPROM (electrically programmable read only memory). EPROM fuses are also one time programmable, and require complicated metal shielding over the fuse after programming to retain the charge. Other implementations use EEPROM (electrically erasable programmable read only memory) fuses. EEPROM fuses are typically large compared to the flash fuses used herein.
In U.S. Pat. No. 4,617,651 by W. Ip and G. Perlegos and U.S. Pat. No. 4,538,245 by G. Smarandolu and G. Perlegos, the redundancy is row redundancy only, not column redundancy as in the present invention. Further, the redundancy scheme is not applicable to analog signal sample storage due to the requirement of sampling and writing at the same time. Also, a redundancy disable/enable circuit is required for each redundancy row. In the present invention, out-of-bound addresses are used for self enabling, thus eliminating the redundancy disable/enable circuit. Also, in the '651 and '245 patents, the redundancy element is a one time programmable fuse versus the source side injection flash fuse of the present invention. The flash fuse of the present invention enables the redundancy to be programmable many times, and eliminates the need for devices capable of high current as required to burn a one time programmable fuse.
In U.S. Pat. No. 5,642,316 by H. V. Tran and T. Blyth, the redundancy is row redundancy, not column redundancy, and the memory fuses are EEPROM fuses instead of flash fuses. The row redundancy is not applicable to column redundancy due to the requirement of writing and sampling at the same time.